GSI Technology Memories and IP for Xilinx FPGAs
Worried about not hitting your performance targets? GSI Technology has you covered with leading-edge memory subsystems for your Xilinx 7 Series and Ultrascale designs.
Unleash your design with GSI's Memory Controller IP. It is hardware-validated by multiple customers and available with a no-cost, multiple-use license. Design a solution using GSI SigmaQuadTM or SigmaDDRTM SRAMs, Low Latency DRAMs, or Bandwidth Engine® processors.
In addition, GSI Technology is the first and only SRAM vendor to offer FREE memory-controller IP. It is designed to squeeze the most performance out of our ground-breaking SigmaQuad and SigmaDDR SRAM families. Those GSI products and services that will make your Xilinx project run better than ever:
- SigmaQuad-IVe SRAMs
- SigmaDDR-IVe SRAMs
- SigmaQuad-IIIe SRAMs
- SigmaDDR-IIIe SRAMs
- SigmaQuad-II+ SRAMs
- SigmaDDR-II+ SRAMs
- SigmaQuad-II SRAMs
- SigmaDDR-II SRAMs
- SyncBurst SRAMs
- NBT SRAMs
- LLDRAM II
- Bandwidth Engine 2
GSI offers a IIIe SRAM Interface Port IP that can be used in any Xilinx 7 Series, Xilinx 6 Series and a II+ Interface Port IP for use with Xilinx 7 Series FPGAs.
GSI’s SigmaQuad and SigmaDDR SRAMs are our highest performance SRAMs and as you might expect, with GSI’s SRAM Port IP, users can get faster SRAM performance than ever before. But perhaps even more importantly, GSI’s SRAM Port IP now gives FPGA users access to ALL the modes of operation including those that, up to now, have only been available to ASIC users of Quad and DDR SRAMs.
GSI’s SRAM Port IP supports:
- Burst of 4 Quad operations for x18 and x36 data bus width
- Burst of 2 Quad operations for x18 and x36 data bus width (NEW for FPGA users)
- Burst of 2 Common I/O DDR operations for x18 and x36 data bus width (NEW for FPGA users)